A half-adder circuit is a fundamental digital circuit used in computer engineering and digital electronics. It is designed to perform addition of two binary digits (bits) and generate two outputs: the sum bit (S) and the carry-out bit (C). The half-adder can add two 1-bit binary numbers and produce the corresponding 1-bit results.
Here's the truth table for a half-adder:
Input A Input B Sum (S) Carry-out (C)
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
As you can see, the sum (S) bit is the result of the XOR operation between the two input bits (A and B), while the carry-out (C) bit is the result of the AND operation between the same two input bits (A and B).
The half-adder circuit is often a building block for more complex digital circuits, like full-adders, which can add multiple bits together and account for a carry-in from previous stages. Full-adders are used to construct multi-bit binary adders and arithmetic logic units (ALUs) found in CPUs and other digital systems.