A Phase-Locked Loop (PLL) is an electronic circuit used in various applications, including frequency synthesis, to generate an output signal with a frequency that is both stable and controllable. It achieves this by comparing the phase of an input reference signal (usually referred to as the "reference signal" or "reference oscillator") to the phase of an internally generated feedback signal (usually referred to as the "feedback signal" or "VCO signal"), and then adjusting the frequency of the feedback signal until the phase difference remains constant.
The primary purpose of a PLL in frequency synthesis is to generate an output signal whose frequency is a multiple or fraction of the frequency of the reference signal. This is valuable in a wide range of applications, such as communication systems, radio transmitters and receivers, clock generation for digital systems, and more. Here's how a PLL achieves frequency synthesis:
Phase Comparison (Phase Detector/Comparator): The PLL begins by comparing the phase of the reference signal with the phase of the feedback signal using